P4C1049

Page 7 of 12

Document # SRAM128 REV OR

Notes:

10. CE and WE must be LOW for WRITE cycle.

11. OE is LOW for this WRITE cycle to show t

12. If CE goes HIGH simultaneously with WE HIGH, the output remains

in a high impedance state

13. Write Cycle Time is measured from the last valid address to the first

transitioning address.

TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CE

CE

CE

CE