AN753

DS00753A-page 2

 2001 Microchip Technology Inc.

BINARY TWO’S COMPLEMENT CODE

In some applications it may be necessary for an ADC

to convert negative and positive values. The logic mod-

ification that allows this flexibility in the digital output

code is to produce the bipolar results called offset

binary two’s complement. Binary two’s complement

arithmetic is widely used in microcontrollers, calcula-

tors and computers.

Binary two’s complement is not as straight forward as

the scheme for straight binary. The codes are not con-

tinuous from one end to the other due to the discontinu-

ity that occurs at the analog bipolar zero.

The two’s complement of a negative binary number is

generated by logically complementing all the digits of

the positive binary number, hence converting it to the

negative binary number counterpart as shown in

Table 2. With this coding scheme, the MSB can be con-

sidered a sign indicator. When the MSB is a logic ‘0’, a

positive value is indicated and when the MSB is a logic

‘1’, a negative value is indicated.

This system is has an odd number of codes and only

one zero state. It is also mathematically consistent

making it synergistic with signed arithmetic functions.

The A/D converters from Microchip that produce a

binary two’s complement output code are from the

thermal sensors families.

These devices are operated in a full-differential input

mode. In this mode, the full-scale range of the device is

equal to:

And the input voltage presented to the converter is

equal to:

These converters will produce digital code that repre-

sents both negative and positive analog inputs.

Median Voltage (V)

Digital Code

0111

0110

0101

0100

0011

0010

0001

0

0000

1111

1110

1101

1100

1011

1010

1001

-1 FS

1000

TABLE 2:

The

binary

two’s

complement

representation of zero volts is also equal to a digital

(0000). The analog positive full-scale minus one LSB

digital representation is equal to (0111) and the analog

negative full-scale representation is (1000).

FS range

IN

()

–

()

IN

()

–

()

+

=

AIN

IN+

()–IN-

()

()

=