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TUSB1064 데이터시트(PDF) 41 Page - Texas Instruments |
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TUSB1064 데이터시트(HTML) 41 Page - Texas Instruments |
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41 / 52 page ![]() Table 9-3. DisplayPort Control/Status Registers (0x10) (continued) Bit Field Type Reset Description 3:0 DP3EQ_SEL R/W/U 0000 Field selects EQ level for DP lane 3. When EQ_OVERRIDE = 1’b0, this field reflects the sampled state of DPEQ[1:0] pins. When EQ_OVERRIDE = 1’b1, software can change the EQ setting for DP lane 3 based on value written to this field. www.ti.com TUSB1064-Q1 SLLSFP0 – SEPTEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 41 Product Folder Links: TUSB1064-Q1 |
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