| 전자부품 데이터시트 검색엔진 |
|
LC750512E 데이터시트(PDF) 2 Page - Sanyo Semicon Device |
|
|
|||||||||||||||||||||||||||||
LC750512E 데이터시트(HTML) 2 Page - Sanyo Semicon Device |
|
2 / 9 page ![]() LC750512E No.A0179-2/9 S3S mode Effect Algorithm (Name) Remarks Low frequency enhancement S-Live SANYO’s proprietary low frequency enhancement algorithm Surround Digital AViSS SANYO’s proprietary sound field control algorithm The audio processing functions listed in the table below can be installed by making changes to the program ROM. (These functions have not been installed in the LC750512E). Effect Algorithm (Name) Remarks Surround Dolby Prologic II Registered trademark of Dolby Laboratories, Inc. Low frequency enhancement TruBass Registered trademark of SRS Labs, Inc. Sound field correction Focus Registered trademark of SRS Labs, Inc. Virtual surround SRS 3D,TruSurround Registered trademark of SRS Labs, Inc. Low- and high-frequency enhancement Dedekind Registered trademark of Dedekind R&D Low- and high-frequency augumentation BBE Registered trademark of BBE Sound Inc. Note 1: Users must be licensees of the algorithms listed. Model names are subject to change. Note 2: Processing estimates for using the algorithms will be based on the combinations in which the desired functions are used. 3. Microcontroller interface • CCB and I2C support 4. Supply voltages • Analog: 3.3V, 5V • Digital: 1.8V, 3.3V Specifications Absolute Maximum Ratings at VSS = 0V, AVSS = 0V Ratings Parameter Symbol Conditions min typ max unit Supply voltage (A/D, D/A, volume, etc.) VDD max1 AVDD1, AVDD2, AVDD3 -0.3 +6.0 V Supply voltage (A/D, D/A, volume, etc.) VDD max1 BVDD1 -0.3 +3.96 V Supply voltage (crystal oscillator) VDD max2 XVDD -0.3 +3.96 V Supply voltage (I/O interface block ) VDD max3 CVDD1, CVDD2, CVDD3, CVDD4 -0.3 +3.96 V Supply voltage (DSP core block, PLL block) VDD max4 DVDD1, DVDD2, DVDD3, DVDD4 PLLDVDD, PLLAVDD, PLLPWRR -0.3 +2.16 V Maximum input voltage (A/D, D/A, volume, etc.) VIN1 INL, INR EVRINL, EVRINR -0.3 AVDD+0.3 (max+6.0V) V Maximum input voltage (DSP core block) (I/O interface block) VIN2 TEST0, TEST1, TEST2, TEST3, TEST4, TEST5, TEST6, TEST7 SCKI, LRCKI, BCKI, DATAI, CE, SCL/CL, I 2CBUSY/DI, SDA/DO, MCUIFSEL, XPDESC, RSTB, PWDB, INTB, XSEL0, XSEL1, XSEL2 -0.3 CVDD+0.3 (max+3.96V) V Maximum output voltage VOUT CVDD -0.3 CVDD+0.3 V Allowable power dissipation Pd max Conditions: audio disabled operating state, mounted on a standard board* 850 mW Maximum output current IO SDA/DO 0 4 mA Operating temperature Topr -20 +75 °C Storage temperature Tstg -55 +125 °C *: Standard board: 76.1mm ×114.3mm×1.6mm; glass epoxy resin |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |