 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
MB95F104AJS 데이터시트(PDF) 49 Page - fujitsu semiconductor |
|
|
|||||||||||||||||||||||||||||
MB95F104AJS 데이터시트(HTML) 49 Page - fujitsu semiconductor |
|
|
49 / 72 page  MB95100AM Series 49 (6) UART/SIO, Serial I/O Timing (Vcc = 5.0 V ± 10%, AVss = Vss = 0.0 V, TA = − 40 °C to + 85 °C) * : Refer to “ (2) Source Clock/Machine Clock” for tMCLK. Parameter Symbol Pin name Conditions Value Unit Min Max Serial clock cycle time tSCYC UCK0 Internal clock operation 4 tMCLK* ⎯ ns UCK ↓ → UO time tSLOV UCK0, UO0 − 190 + 190 ns Valid UI → UCK ↑ tIVSH UCK0, UI0 2 tMCLK* ⎯ ns UCK ↑ → valid UI hold time tSHIX UCK0, UI0 2 tMCLK* ⎯ ns Serial clock “H” pulse width tSHSL UCK0 External clock operation 4 tMCLK* ⎯ ns Serial clock “L” pulse width tSLSH UCK0 4 tMCLK* ⎯ ns UCK ↓ → UO time tSLOV UCK0, UO0 ⎯ 190 ns Valid UI → UCK ↑ tIVSH UCK0, UI0 2 tMCLK* ⎯ ns UCK ↑ → valid UI hold time tSHIX UCK0, UI0 2 tMCLK* ⎯ ns tSCYC tIVSH 0.8 VCC 0.2 VCC 0.8 VCC 0.2 VCC tSHIX tSLOV 0.8 V 2.4 V 0.8 V 2.4 V UCK0 UO0 UI0 0.8 V tSLSH tIVSH tSHIX tSLOV 0.2 VCC 0.2 VCC 0.8 VCC 0.8 VCC tSHSL 2.4 V UCK0 UO0 UI0 0.8 V 0.8 VCC 0.2 VCC 0.8 VCC 0.2 VCC • Internal shift clock mode • External shift clock mode |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
