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TMS470PLF111 데이터시트(PDF) 16 Page - Texas Instruments

부품명 TMS470PLF111
상세설명  16/32-BIT RISC FLASH MICROCONTROLLER
PDF  63 Pages
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TMS470PLF111 데이터시트(HTML) 16 Page - Texas Instruments

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TMS470PLF111
16/32-BIT RISC FLASH MICROCONTROLLER
SPNS113 – OCTOBER 2006
16
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251-1443
interrupt priority (VIM)
The vectored interrupt module (VIM) provides a fully programmable priority scheme. Interrupt requests origi-
nating from the PLF111 peripheral modules (i.e., SPI; LIN1 or LIN2; RTI; etc.) are assigned to channels within
the 32-channel VIM where, via programmable register mapping, the interrupt priority of the channels can be
changed. Programming multiple interrupt sources to the same VIM channel effectively shares the VIM channel
between sources.
The VIM request channels are maskable so that individual channels can be selectively disabled. All interrupt
requests can be programmed in the VIM to be of either type:
Fast interrupt request (FIQ)
Normal interrupt request (IRQ)
The VIM prioritizes interrupts. The precedences of request channels decrease with ascending channel order
in the VIM (0 [highest] and 31 [lowest] priority). For VIM default mapping, channel priorities, and their associated
modules, see Table 6, Interrupt Priority (VIM).
Table 6. Interrupt Priority (VIM)
MODULES
INTERRUPT SOURCES
DEFAULT VIM
INTERRUPT REQUEST
MAPPING
System
System error
0
System
SW interrupt (SSI)
1
RTI
RTI compare interrupt 0
2
RTI
RTI compare interrupt 1
3
RTI
RTI compare interrupt 2
4
RTI
RTI compare interrupt 3
5
RTI
RTI overflow interrupt 0
6
RTI
RTI overflow interrupt 1
7
RESERVED
8
GIO
GIO interrupt A
9
GIO
GIO interrupt B
10
HET
HET level 0 interrupt
11
HET
HET level 1 interrupt
12
SPI1
SPI1 level 0 interrupt
13
SPI1
SPI1 level 1 interrupt
14
LIN2
LIN2 level 0 interrupt
15
LIN2
LIN2 level 1 interrupt
16
SCC
SCC level 0 interrupt
17
SCC
SCC level 1 interrupt
18
ADC
ADC level 0 interrupt
19
ADC
ADC level 1 interrupt
20
I2C
I2C level 0 interrupt
21
I2C
I2C level 1 interrupt
22
FLASH ECC
Flash ECC interrupt
23
RESERVED
24
C2SIb
C2SIb interrupt
25



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