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LRI64-MBTG 데이터시트(PDF) 8 Page - STMicroelectronics

부품명 LRI64-MBTG
상세설명  Memory TAG IC at 13.56 MHz, with 64-bit Unique ID and WORM user area, ISO15693 and ISO18000-3 Mode 1 compliant
PDF  52 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

LRI64-MBTG 데이터시트(HTML) 8 Page - STMicroelectronics

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Description
LRI64
8/52
1.1
Memory mapping
The LRI64 is organized as 15 blocks of 8 bits as shown in Figure 3. Each block is
automatically write-protected after the first valid write access.
Figure 3.
LRI64 memory mapping
The LRI64 uses the first 8 blocks (blocks 0 to 7) to store the 64-bit Unique Identifier (UID).
The UID is used during the anti-collision sequence (Inventory). It is written, by ST, at time of
manufacture, but part of it can be customer-accessible and customer-writable, on special
request.
The LRI64 has an AFI register, in which to store the Application Family Identifier value,
which is also used during the anti-collision sequence.
The LRI64 has a DSFID register, in which to store the Data Storage Format Identifier value,
which is used for the LRI64 Inventory answer.
The five following blocks (blocks 10 to 14) are Write-Once Read-Many (WORM) memory. It
is possible to write to each of them once. After the first valid write access, the block is
automatically locked, and only read commands are possible.
AI09741
Block
Addr
01234567
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
UID 0
UID 1
UID 2
UID 3
UID 4
UID 5 = IC_ID
UID 6 = 02h
UID 7 = E0h
AFI (WORM Area)
DSFID (WORM Area)
WORM Area
WORM Area
WORM Area
WORM Area
WORM Area



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