W99685FS

Publication Release Date: April 13, 2005

- 19 -

Revision A4

5.3.3

Host Interface: CF-IDE Slave (Memory Bus) A.C. Characteristics

FCE1_,FCE2_

FA2:0]

FD[15:0]

FIORD#

Valid Data

T

CAH

T

CAS

T

ODD

T

ODH

T

RD

FD[15:0]

FIOWR#

Valid Data

T

CAH

T

CAS

T

WDS

T

WDH

T

WR

Figure 5.3 Host Interface: CF-IDE Slave (Memory Bus) Timing Diagram

Host Interface : CF_IDE Slave (Memory Bus) Timing

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

Chip Select & Address Set-up Time

65

---

nS

Chip Select & Address Hold Time

5

---

nS

FIORD# Low to Data Valid Delay

---

nS

Read Data Output Hold Time

0

---

nS

FIORD# Pulse Width

K

---

nS

Write Data Input Setup Time

60

---

nS

Write Data Input Hold Time

2

---

nS

WR# Pulse Width

K

---

nS

Table 5-5