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PPC440EPX-SPAFFFTS 데이터시트(PDF) 21 Page - Applied Micro Circuits Corporation |
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PPC440EPX-SPAFFFTS 데이터시트(HTML) 21 Page - Applied Micro Circuits Corporation |
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21 / 94 page ![]() 440EPx – PPC440EPx Embedded Processor Revision 1.26 – October 15, 2007 AMCC Proprietary 21 Preliminary Data Sheet Signal Lists The following table lists all the external signals in alphabetical order and shows the ball (pin) number on which the signal appears. Multiplexed signals are shown with the default signal (following reset) not in brackets and alternate signals in brackets. Multiplexed signals appear alphabetically multiple times in the list—once for each signal name on the ball. The page number listed gives the page in Table 8 on page 57 where the signals in the indicated interface group begin. In cases where signals in the same interface group (for example, Ethernet) have different names to distinguish variations in the mode of operation, the names are separated by a comma with the primary mode name appearing first. In cases where the signals have the same function but are associated with different ports (for example, UART), the signals are separated by a slash (/). These signals are listed only once, and appear alphabetically by the primary mode or primary port name. Alphabetical Signal List Table 5. Signals Listed Alphabetically (Sheet 1 of 25) Signal Name Ball Interface Group Page AGND AP25 Power 65 AVDD AP24 BA0 AJ03 DDR SDRAM 58 BA1 AK03 BA2 AP08 BankSel0 AH02 DDR SDRAM 58 BankSel1 AH01 [BusReq][USB2TermSel]GPIO31 P04 External Master Peripheral 61 CAS AH04 DDR SDRAM 58 ClkEn AN09 DDR SDRAM 58 DM0 AL21 DDR SDRAM 58 DM1 AM18 DM2 AP15 DM3 AL14 DM4 AE04 DM5 AB03 DM6 Y01 DM7 U03 DM8 AN10 [DMAAck0][IRQ8]GPIO47 T34 External Slave Peripheral 60 [DMAAck1][IRQ4]GPIO44 V32 [DMAAck2][PerAddr06]GPIO01 C25 [DMAAck3][PerAddr03]GPIO04 D26 [DMAReq0][IRQ7]GPIO46 U32 External Slave Peripheral 60 [DMAReq1]IRQ5[ModeCtrl] W34 [DMAReq2][PerAddr07]GPIO00 B25 [DMAReq3][PerAddr04]GPIO03 A26 |
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