13 / 41 page
MCS7840
USB-2.0 to Four Serial Ports
Rev.
1.2
Page 13
Interrupt Status Register (ISR):
The source of the highest priority pending interrupt is indicated by the contents of the Interrupt Status
Register. There are five sources of interrupts and four levels of priority (1 is the highest) as tabulated below:
Register:
ISR
Description:
Interrupt Status Register
Offset:
2
Permissions:
Read
Access Condition:
Default Value:
0x00
Bit[7]
Bit[6]
Bit[5]
Bit[4]
Bit[3]
Bit[2]
Bit[1]
Bit[0]
FIFOs Enabled
Interrupt Priority
(Enhanced Mode)
Interrupt Priority
(All Modes)
Interrupt
Pending
Interrupt
Source and Priority
Table
Priority Level
Interrupt Source
ISR[5:0]
-
No interrupt pending
6’b000001
1
Receiver Status Error
or address bit detected in 9-bit mode
6’b000110
2a
Receiver Data Available
6’b000100
2b
Receiver Time-Out
6’b001100
3
Transmitter THR Empty
6’b000010
4
Modem Status Change
6’b000000
Note: ISR[0] indicates whether any interrupt is pending
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
