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MX98726EC 데이터시트(PDF) 2 Page - Macronix International

부품명 MX98726EC
상세설명  SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER WITH uP INTERFACE
PDF  56 Pages
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제조업체  MCNIX [Macronix International]
홈페이지  http://www.macronix.com
Logo MCNIX - Macronix International

MX98726EC 데이터시트(HTML) 2 Page - Macronix International

  MX98726EC Datasheet HTML 1Page - Macronix International MX98726EC Datasheet HTML 2Page - Macronix International MX98726EC Datasheet HTML 3Page - Macronix International MX98726EC Datasheet HTML 4Page - Macronix International MX98726EC Datasheet HTML 5Page - Macronix International MX98726EC Datasheet HTML 6Page - Macronix International MX98726EC Datasheet HTML 7Page - Macronix International MX98726EC Datasheet HTML 8Page - Macronix International MX98726EC Datasheet HTML 9Page - Macronix International Next Button
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P/N:PM0729
REV. 1.1, MAY. 28, 2001
MX98726EC
1.2 Internal Block Diagram
Packet Buffer
(SRAM)
SRAMIU
RX
FIFO
RX
SM
Host
BIU
TX
FIFO
TX
SM
PCS
Architecture and Interface overview
100 TX PHY
100TX PMD
interface
NWAY
CTRL & REGS
10Mbps
MCC+TP interface
EPROM
MII Interface
Serial ROM port
1.3 Typical Applications
uP with dedicate bus
MX98726EC
Packet
buffer
Customer Application
Interleaved memory Architecture
TP cable
RJ45
Xformer
decode
EPROM
C46/C66
local DMA
Host side
CSB



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