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SC4624SETRT 데이터시트(PDF) 16 Page - Semtech Corporation

부품명 SC4624SETRT
상세설명  Low Input Voltage, High Efficiency, 4A Integrated FET Synchronous Step down DC/DC Regulator
PDF  20 Pages
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제조업체  SEMTECH [Semtech Corporation]
홈페이지  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

SC4624SETRT 데이터시트(HTML) 16 Page - Semtech Corporation

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 2007 Semtech Corp.
www.semtech.com
POWER MANAGEMENT
SC4624
Operation
Application Information (Cont.)
Application Information (Cont.)
Layout Guidelines
In order to achieve optimal thermal and noise immunity
for high frequency converters, special attention must be
paid to the PCB layout. The goal of layout optimization
is to minimize the high di/dt loops and reduce ground
bounce.
Output voltage setting, line regulation, stability , switching
frequency and OCP trip point shifted are affected by a
poor layout. The following guidelines should be used to
ensure proper functions of the converters.
Both Power ground (PGND) and signal ground (AGND)
are separated.
A ground plane is recommended to minimize noise
and copper losses, and maximize heat dissipation.
Start the PCB layout by placing the power components
first. Arrange the power circuit to achieve a clean
power flow route.
Minimize all high di/dt loops. These loops pass high
di/dt current. Make sure the trace width is wide
enough to reduce copper losses in this loop. Ground
bounce happen to magnetic flux changed and it is
proportional to a magnetic filed which goes through
high di/dt loops.
The input ceramic capacitor (C
IN) should be close to
PV
IN pins and PGND pins.
Both input ceramic capacitor gnd and output ceramic
capacitor gnd are at same port.
A RC snubber circuit between PV
IN and PH pins is
helpful for stability operation. Be careful with power
derating of snubber circuit.
The V
CC bypass capacitor should be placed next to the
V
CC and AGND pins.
The OCP setting resistor (R
ISET) and filter capacitor
(C
ISET) should be placed next to the ISET and AGND
pins.
Feedback divider connects to output connector by
Kelvin connection and far away from the noise sources
such as switching node and switching components.
A multilayer chip beads between AGND and PGND
will reduce the ground bounce injected to the “quiet”
circuit. It’s helpful for stability operation.
A large copper area underneath the SC4624 IC is
necessary for heat sinking purpose. And multiple
layers of large copper area connected through vias
can be used for better thermal performance. The size
of the vias as the connection between multiple layers
should not be too large or solder may seep through
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the big vias to the bottom layer during the re-flow process
.



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