AK4635ECB datasheet(32/81 Pages) AKM

32 / 81 page

[AK4635]

Rev. 0.6

2007/10

- 32 -

■ EXT Master Mode (PMPLL bit = “0”, M/S bit = “1”)

The AK4635 becomes EXT Master Mode by setting PMPLL bit = “0” and M/S bit = “1”. Master clock is input from the

MCKI pin, the internal PLL circuit is not operated. The clock required to operate is MCKI (256fs, 512fs or 1024fs). The

input frequency of MCKI is selected by FS1-0 bits (Table 14). The BICK is selected among 32fs or 64fs, by BCKO1-0

bits (Table 15). FCK bit should be set to “0”.

Mode

FS3-2 bits

FS1 bit

FS0 bit

MCKI Input

Frequency

Sampling Frequency

Range

256fs

7.35kHz

≤ fs ≤ 48kHz (default)

1024fs

7.35kHz

≤ fs ≤ 13kHz

512fs

7.35kHz

≤ fs ≤ 26kHz

256fs

7.35kHz

≤ fs ≤ 48kHz

Table 14. MCKI Frequency at EXT Master Mode (PMPLL bit = “0”, M/S bit = “1”) (x: Don’t care)

External Master Mode does not support Mode 0 (DSP Mode) of Audio Interface Format.

MCKI should always be present whenever the ADC, DAC, SPK or Programmable Filter is in operation (PMADC =

PMDAC = PMSPK bit = PMPFIL bits = “1”). If MCKI is not provided, the AK4635 may draw excess current and it is not

possible to operate properly because utilizes dynamic refreshed logic internally. If MCKI is not present, the ADC, DAC,

SPK and Programmable Filter should be in the power-down mode (PMADC = PMDAC = PMSPK = PMPFIL bits = “0”).

AK4635

DSP or

μP

MCKI

BICK

FCK

SDTO

SDTI

BCLK

FCK

SDTI

SDTO

MCKO

1fs

32fs, 64fs

MCLK

256fs, 512fs or 1024fs

Figure 28. EXT Master Mode

Mode

BCKO1

BCKO0

BICK Output

Frequency

N/A

(default)

32fs

64fs

N/A

Table 15. BICK Output Frequency at Master Mode (N/A: Not available)

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