ML145502, ML145503, ML145505

LANSDALE Semiconductor, Inc.

Figure 2. Transmit Timing Diagram

* Data output during this time will vary depending on TDC rate and TDE timing.

TDE

TDC

tsu2

tsu1

12

3

tP1

tP4

fCL

tw

tw

tsu8

MSB

LSB

TDD

tP3

tP2

tP3

tP2

45

6

7

89

10

11

PCM WORD REPEATED

*

Figure 3. Receive Timing Diagram

DON’T

CARE

RCE

RDC

RDD

LSB

MSB

DON’T

CARE

12

34

5

6

78

9

10

11

tw

fCL

tw

tw

tsu5

tsu4

tsu3

th

Figure 4. MSI/CCI Timing Diagram

MSI

CCI

12

34

5

6

7

8

9

10

11

tw

tw

tw

tsu7

tsu6

www.lansdale.com

Page 13 of 26

Issue A