MPC8280 datasheet(341/1386 Pages) FREESCALE

341 / 1386 page

PCI Bridge

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

9-33

9.11.1.6

Discard Timer Control Register (PTCR)

The discard timer control register (PTCR), shown in Figure 9-20, configures the discard timer used to put

a time limit on delayed read transactions from non-prefetchable memory.

Figure 9-20. Discard Timer Control register (PTCR)

Table 9-7 describes PTCR fields.

9.11.1.7

General Purpose Control Register (GPCR)

The general purpose control register (GPCR), shown in Figure 9-21, contains control bits for rerouting

interrupts and adjusting the DMA controller’s 60x bandwidth.

Field

—

PTV

Reset

0000_0000_0000_0000

R/W

Addr

0x1087A

Field

PTV

Reset

0000_0000_0000_0000

R/W

Addr

0x10878

Table 9-7. PTCR Field Descriptions

Bits

Name

Description

Enable

Discard timer enable.

0 Disable the discard timer

1 Enable the discard timer

30–24

—

Reserved

23–0

Preload timer value

Preload value for 24-bit discard timer. Delayed PCI read transactions to a

non-prefetchable address space remain valid within the PCI bridge a minimum of

(224 - Preload Timer Value) internal clock cycles. The discard timer is used to

discard delayed reads from non-prefetchable address space if the master has not

repeated the transaction in

n internal clock cycles, where n = (224 - Preload Timer

Value). Valid Preload Timer Values are in the range 0x000000–0xFFFFFE.

Example: To discard a delayed completion if the PCI master has not repeated the

transaction in 215 PCI clocks and the internal frequency is 2 to 1 to the PCI bus. The

Preload Timer Value should equal 224 -216 (0xFF0000).

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