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MPC8280 데이터시트(PDF) 377 Page - Freescale Semiconductor, Inc |
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MPC8280 데이터시트(HTML) 377 Page - Freescale Semiconductor, Inc |
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377 / 1386 page ![]() PCI Bridge MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor 9-69 Figure 9-62. Outbound Doorbell Register (ODR) 9.12.2.2 Inbound Doorbell Register (IDR) IDR, described in Figure 9-63 and Table 9-49, is accessible from the PCI bus and the 60x bus in both host and agent modes. Figure 9-63. Inbound Doorbell Register (IDR) 31 29 28 16 Field — ODR x Reset 0000_0000_0000_0000 R/W Refer to Table 9-48. Addr 0x10462 15 0 Field ODR x Reset 0000_0000_0000_0000 R/W Refer to Table 9-48. Addr 0x10460 Table 9-48. ODR Field Descriptions Bits Name Access Description 31–29 — R Reserved, should be cleared. 28–0 ODR x Write 1 to set from local processor. Write 1 to clear from PCI. Outbound door bell x, where x is each bit. Writing a bit in this register from the local processor causes an interrupt (INTA) to be generated. 31 30 16 Field IMC IDR x Reset 0000_0000_0000_0000 R/W R/W Addr 0x1046A 15 0 Field IDR x Reset 0000_0000_0000_0000 R/W R/W Addr 0x10468 |
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