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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MPC8280 데이터시트(PDF) 419 Page - Freescale Semiconductor, Inc |
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MPC8280 데이터시트(HTML) 419 Page - Freescale Semiconductor, Inc |
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419 / 1386 page  Clocks and Power Control MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor 10-9 10.6 Clock Configuration Modes The MPC8280 has three clocking modes: local, PCI host, and PCI agent. The clocking mode is set according to three input pins—PCI_MODE, PCI_CFG[0], PCI_MODCK. In each clocking mode, the configuration of bus, core, PCI, and CPM frequencies is determined by seven bits during the power-on reset—three hardware configuration pins (MODCK[1–3]) and four bits from hardware configuration word[28–31] (MODCK_H). Both the PLLs and the dividers are set according to the selected MPC8280 clock operation mode. For further information and complete lists of each clock mode’s possible clock configurations, see Section 7, “Clock Configuration Modes,” in the MPC8280 PowerQUICC II Family Hardware Specifications (order number: MPC8280EC). 0x1C 8x 0x03, 0x13 PLL off/bypassed 0x0F, 0x1F PLL off Table 10-4. 60x Bus-to-Core Frequency (continued) SCMR[CORECNF] Bus-to-Core Multiplier |
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