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MPC8280 데이터시트(PDF) 511 Page - Freescale Semiconductor, Inc |
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MPC8280 데이터시트(HTML) 511 Page - Freescale Semiconductor, Inc |
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511 / 1386 page ![]() Memory Controller MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor 11-91 • If GPL_4 is not used as an output, the performance for a page read access can be improved by setting MxMR[GPL_x4DIS]. The following example shows how the burst read access to FPM DRAM (no LOOP) can be modified using this feature. In this case the configuration registers are defined in the following way. The timing diagram in Figure 11-75 shows how the burst-read access shown in Figure 11-70 can be reduced. Table 11-43. UPMs Attributes Example Explanation Field Value Machine select UPMA BR x[MS] 0b100 Port size 64-bit BR x[PS] 0b00 No write protect (R/W) BR x[WP] 0b0 Refresh timer value (1024 refresh cycles) PURT[PURT] 0x0C Refresh timer enable M xMR[RFEN] 0b1 Address multiplex size M xMR[AMx] 0b010 Disable timer period M xMR[DSx] 0b01 Select between GPL4 and UPMWAIT = UPMWAIT, data sampled at clock negative edge M xMR[GPL_x4DIS] 0b1 Burst inhibit device OR x[BI] 0b0 |
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