MPC8280 datasheet(667/1386 Pages) FREESCALE

667 / 1386 page

SDMA Channels and IDMA Emulation

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

19-21

Table 19-8 describes valid STS/DTS values for memory/peripheral operations.

Table 19-7. Valid Memory-to-Memory STS/DTS Values

DMA_WRAP

Internal

Buffer

Size

SS_MAX

STS (in Bytes)

DTS (in Bytes)

Number of Transfers to Fill

Internal Buffer

STS Size

DTS Size

000

1 * 32

001

128

3 * 32

3 * 32, 32

1, 3

3 * 32, 32

3 * 32

1, 3

010

256

7 * 32

7 * 32, 32

1, 7

7 * 32, 32

7 * 32

1, 7

011

512

15 * 32

15 * 32, 3 * 32, 5 * 32, 32

1, 5, 3, 15

15 * 32, 3 * 32, 5 * 32, 32

15 * 32

1, 5, 3, 15

100

1024

31 * 32

31 * 32, 32

1, 31

31 * 32, 32

31 * 32

1, 31

101

2048

63 * 32

63 * 32, 9 * 32, 7 * 32, 32

1, 7, 9, 63

63 * 32, 9 * 32, 7 * 32, 32

63 * 32

1, 7, 9, 63

Table 19-8. Valid STS/DTS Values for Peripherals

DMA_WRAP

Internal Buffer Size SS_MAX

S/D Mode

STS (in Bytes)

DTS (in Bytes)

000

1 * 32

1, 2, 4, 8 (single)1; 32

(burst)2

1, 2, 4, 8 (single); 32

(burst)

1 * 32

001

128

3 * 32

1, 2, 4, 8 (single); 32

(burst)

1, 2, 4, 8 (single); 32

(burst)

3 * 32

010

256

7 * 32

1, 2, 4, 8 (single); 32

(burst)

1, 2, 4, 8 (single); 32

(burst)

7 * 32

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