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MPC8280 데이터시트(PDF) 855 Page - Freescale Semiconductor, Inc |
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MPC8280 데이터시트(HTML) 855 Page - Freescale Semiconductor, Inc |
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855 / 1386 page ![]() MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor 28-1 Chapter 28 Serial Management Controllers (SMCs) The two serial management controllers (SMCs) are full-duplex ports that can be configured independently to support one of three protocols or modes—UART, transparent, or general-circuit interface (GCI). Simple UART operation is used to provide a debug/monitor port in an application, which allows the SCCs to be free for other purposes. The SMC in UART mode is not as complex as that of the SCC in UART mode. The SMC clock can be derived from one of the internal baud rate generators or from an external clock signal. However, the clock should be a 16 × clock. In totally transparent mode, the SMC can be connected to a TDM channel (such as a T1 line) or directly to its own set of signals. The receive and transmit clocks are derived from the TDM channel, the internal baud rate generators, or from an external 1 × clock. The transparent protocol allows the transmitter and receiver to use the external synchronization signal. The SMC in transparent mode is not as complex as that of the SCC in transparent mode. Each SMC supports the C/I and monitor channels of the GCI bus, for which the SMC connects to a time-division multiplex (TDM) channel in a serial interface (SIx). SMCs support loopback and echo modes for testing. The SMC receiver and transmitter are double-buffered, corresponding to an effective FIFO size (latency) of two characters. Chapter 15, “Serial Interface with Time-Slot Assigner,” describes GCI interface configuration. Figure 28-1 shows the SMC block diagram. Figure 28-1. SMC Block Diagram Shifter SYNC Rx Data Register Tx Data Register RXD Control Logic TXD Control Registers Shifter Peripheral Bus CLK 60x Bus |
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