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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MPC8280 데이터시트(PDF) 957 Page - Freescale Semiconductor, Inc |
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MPC8280 데이터시트(HTML) 957 Page - Freescale Semiconductor, Inc |
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957 / 1386 page  Fast Communications Controllers (FCCs) MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor 30-19 Figure 30-11. CTS Lost NOTE If GFMR[CTSS] = 1, all CTS transitions must occur while the transmit clock is low. Reception delays are determined by CD as Figure 30-12 shows. If GFMR[CDS] = 0, CD is sampled on the rising receive clock edge before data is received. If GFMR[CDS] = 1, CD transitions immediately cause data to be gated into the receiver. 1. GFMR[CTSS] = 0. CTSP=0 or no CTS lost can occur. TCLK TXD First Bit of Frame Data Note: CTS Sampled Low 1. GFMR[CTSS] = 1. CTSP=0 or no CTS lost can occur. TCLK First Bit of Frame Data Note: CTS Sampled High Data Forced High RTS Forced High Data Forced High RTS Forced High CTS Lost Signaled in BD CTS Lost Signaled in BD (Output) RTS (Output) CTS (Input) CTS (Input) RTS (Output) TXD (Output) |
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