MPC8280 datasheet(1055/1386 Pages) FREESCALE

1055 / 1386 page

ATM Controller and AAL0, AAL1, and AAL5

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

31-95

Table 31-52 describes FIRERx fields.

31.15.1.6 FCC Internal Rate Selection Registers (FIRSR

x_HI, FIRSRx_LO)

If TIREM = 1, each PHY can be assigned one of four rates, as configured by the four FCC transmit internal

rate timers. The FCC internal rate selection registers (FIRSRx_HI, FIRSRx_LO), shown in Figure 31-66

and Figure 31-67, assign rate group to each of the PHYs.

012

3456

789

Field TIRU

TIRU

Reset

0000_0000_0000_0000

R/W

Addr

0x11384 (FIRER1), 0x113A4 (FIRER2)

Field TIRU

TIRU

—

Reset

0000_0000_0000_0000

R/W

Addr

0x11386 (FIRER1), 0x113A6 (FIRER2)

Figure 31-65. FCC Internal Rate Event Register (FIRER

Table 31-52. FIRER

x Field Descriptions (TIREM=1)

Bit

Name

Description

0–30

TIRUy

Transmit internal rate underrun

0 There is no transmission underrun for this PHY.

1 Transmit internal rate underrun or PHY address y has occurred. Bit is cleared by writing 1 to it.

Writing 0 has no effect on value.

—

Reserved, should be cleared.

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