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iP2003APbF

One of the most critical elements of proper PCB layout with iP2003APbF is the placement of the external

input bypass capacitors and the routing of the connecting power tracks.

PCB Layout Guidelines

It is recommended that the designer uses the following guidelines:

1.

The diagram below suggests the addition of the input bypass capacitors either on the top side of

the PCB (capacitors C1-C6) or top and bottom side (C7, C8), if placement on the bottom side is

feasible. The amount of the input capacitors is based on the input ripple current handling

requirement of the iP2003APbF. To support 12A input RMS current, based on 12V input, 1.3V

and 40A output and 1MHz, the iP2003APbF will require enough input ceramic capacitors to

support the input RMS AC current. These capacitors must be placed as close to the iPOWIR

device as possible.

2.

In the diagram below, observe the routing of the power tracks that connect the external bypass

capacitors.

3.

Provide a mid-layer solid ground plane with connections to the top through vias.

4.

Refer to IR application note AN-1029a to determine the size of the vias and the copper weight

and thickness when designing the PCB.