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EN25P80-75VIP 데이터시트(PDF) 12 Page - Eon Silicon Solution Inc.

부품명 EN25P80-75VIP
상세설명  8 Mbit Uniform Sector, Serial Flash Memory
PDF  30 Pages
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제조업체  EON [Eon Silicon Solution Inc.]
홈페이지  http://www.essi.com.tw
Logo EON - Eon Silicon Solution Inc.

EN25P80-75VIP 데이터시트(HTML) 12 Page - Eon Silicon Solution Inc.

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This Data Sheet may be revised by subsequent versions
©2004 Eon Silicon Solution, Inc., www.essi.com.tw
or modifications due to changes in technical specifications.
12
EN25P80
Rev. C, Issue Date: 2006/12/25
Read Data Bytes (READ) (03h)
The device is first selected by driving Chip Select (CS#) Low. The instruction code for the Read Data
Bytes (READ) instruction is followed by a 3-byte address (A23-A0), each bit being latched-in during the
rising edge of Serial Clock (CLK). Then the memory contents, at that address, is shifted out on Serial Data
Output (DO), each bit being shifted out, at a maximum frequency fR, during the falling edge of Serial Clock
(CLK).
The instruction sequence is shown in Figure 9.. The first byte addressed can be at any location. The
address is automatically incremented to the next higher address after each byte of data is shifted out. The
whole memory can, therefore, be read with a single Read Data Bytes (READ) instruction. When the
highest address is reached, the address counter rolls over to 000000h, allowing the read sequence to be
continued indefinitely.
The Read Data Bytes (READ) instruction is terminated by driving Chip Select (CS#) High. Chip Select
(CS#) can be driven High at any time during data output. Any Read Data Bytes (READ) instruction, while
an Erase, Program or Write cycle is in progress, is rejected without having any effects on the cycle that is
in progress.
Read Data Bytes at Higher Speed (FAST_READ) (0Bh)
The device is first selected by driving Chip Select (CS#) Low. The instruction code for the Read Data
Bytes at Higher Speed (FAST_READ) instruction is followed by a 3-byte address (A23-A0) and a dummy
byte, each bit being latched-in during the rising edge of Serial Clock (CLK). Then the memory contents, at
that address, is shifted out on Serial Data Output (DO), each bit being shifted out, at a maximum
frequency FR, during the falling edge of Serial Clock (CLK).
The instruction sequence is shown in Figure 10.. The first byte addressed can be at any location. The
address is automatically incremented to the next higher address after each byte of data is shifted out. The
whole memory can, therefore, be read with a single Read Data Bytes at Higher Speed (FAST_READ)
instruction. When the highest address is reached, the address counter rolls over to 000000h, allowing the
read sequence to be continued indefinitely.
The Read Data Bytes at Higher Speed (FAST_READ) instruction is terminated by driving Chip Select
(CS#) High. Chip Select (CS#) can be driven High at any time during data output. Any Read Data Bytes at
Higher Speed (FAST_READ) instruction, while an Erase, Program or Write cycle is in progress, is
rejected without having any effects on the cycle that is in progress.



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