S29GL01GP10FFIR12 datasheet(62/77 Pages) SPANSION

부품명	S29GL01GP10FFIR12

상세설명	3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology

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S29GL-P MirrorBit® Flash Family

S29GL-P_00_A7 November 8, 2007

Data

Sheet

(Pre limin ar y)

Figure 11.11 Chip/Sector Erase Operation Timings

Notes

1. SA = sector address (for Sector Erase), VA = Valid Address for reading status data (see Write Operation Status on page 36.)

2. These waveforms are for the word mode

Figure 11.12 Data# Polling Timings (During Embedded Algorithms)

Notes

1. VA = Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array data read cycle.

2. tOE for data polling is 45 ns when VIO = 1.65 to 2.7 V and is 35 ns when VIO = 2.7 to 3.6 V

3. CE# does not need to go high between status bit reads

OE#

CE#

Addresses

VCC

WE#

Data

2AAh

tAH

tWP

tWC

tAS

tWPH

555h for chip erase

10 for Chip Erase

30h

tDS

tVCS

tCS

tDH

55h

tCH

Progress

Complete

tWHWH2

Erase Command Sequence (last two cycles)

Read Status Data

RY/BY#

tRB

tBUSY

WE#

CE#

OE#

High Z

tOE

High Z

DQ7

DQ6–DQ0

RY/BY#

tBUSY

Complement

True

Addresses

tOEH

tCE

tCH

tOH

tDF

Status Data

Complement

Status Data

True

Valid Data

tACC

tRC

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