RT9244GS datasheet(3/15 Pages) RICHTEK

3 / 15 page

RT9244

DS9244-06 March 2007

www.richtek.com

Functional Pin Description

SS (Pin 1)

Connect this SS pin to GND with a capacitor to set the

start time interval. Pull this pin below 1V (ramp valley of

sawtooth wave in pulse width modulator) to shutdown the

converter output.

OVP (Pin 2)

Over voltage trip output.

VID4 (Pin 3), VID3 (Pin 4), VID2 (Pin 5), VID1 (Pin 6),

VID0 (Pin 7)

DAC voltage identification inputs for K8. These pins are

internally pulled to 2.4V if left open.

VOSS (Pin 8)

CORE initial value offset. Connect this pin to GND with a

resistor to set the offset value.

COMP (Pin 9)

Output of the error amplifier and input of the PWM

comparator.

FB (Pin 10)

Inverting input of the internal error amplifier.

ADJ (Pin 11)

Current sense output for active droop adjust. Connect a

resistor from this pin to GND to set the load droop.

VDIF (Pin 12)

CORE differential sense output.

VSEN (Pin 13)

CORE differential sense positive input.

SGND (Pin 14)

CORE differential sense negative input.

to GND with a capacitor to set the rising/falling time at VID

jump.

VCC (Pin 20)

IC power supply. Connect this pin to a 5V supply.

GND (Pin 21)

Ground for the IC.

PWM1 (Pin 26), PWM2 (Pin 25), PWM3 (Pin 21) &

PWM4 (Pin 29)

PWM outputs for each driven channel. Connect these pins

to the PWM input of the MOSFET driver. For systems

which use 3 channels, connect PWM4 high. Two channel

systems connect PWM3 and PWM4 high.

ISP1 (Pin 27), ISP2 (Pin 23), ISP3 (Pin 22) & ISP4

(Pin 28)

RDS(ON) current sense inputs for each individual converter

channel. Tie this pin to the component's sense node.

PGOOD (Pin 30)

Power good open-drain output.

RT (Pin 31)

Switching frequency setting. Connect this pin to GND with

a resistor to set the frequency.

Ω)

Frequency vs. RRT

100

150

200

250

300

350

400

450

20304050

6070

RRT

ISN1 (Pin 18), ISN2 (Pin 17), ISN3 (Pin 16) & ISN4

(Pin 15)

RDS(ON) current sense inputs from each individual converter

channel sense component's GND node.

SS2 (Pin 19)

DAC O/P ramping speed control for K8. Connect this pin

DVD (Pin 32)

Programmable power UVLO detection input. Trip threshold

= 2.0V at V

DVD rising.

RT9244GS 데이터시트(PDF) 3 Page - Richtek Technology Corporation

RT9244GS 데이터시트(HTML) 3 Page - Richtek Technology Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

데이터시트 다운로드

링크 URL