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RT9271PE 데이터시트(PDF) 13 Page - Richtek Technology Corporation |
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RT9271PE 데이터시트(HTML) 13 Page - Richtek Technology Corporation |
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13 / 15 page ![]() RT9271 13 DS9271-13 March 2007 www.richtek.com Layout Guide A full GND plane without gap break. VCC to GND noise bypass –Short and wide connection for the 1 μF MLCC capacitor between Pin6 and Pin2. Minimized LX node copper area to reduce EMI. Minimized FB node copper area and keep far away from noise sources. EVB Circuit Board Layout Example (2-Layer EVB Board) (Refer to EVB Circuit) - Top Layer - - Bottom Layer - V IN VCC EN GND LX FB C2 D1 R2 OVP D2 D4 D3 C5 C1 C3 C4 R1 L1 S3 S2 S1 RT9271 |
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