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HE847701

HE80000 SERIES

March 26, 2004

Page 28 of 29

V1.03

This specification is subject to change without notice. Please contact sales person for the latest version before use.

21. Important Note

1.

For accessing any address large than 64KB, users must update TPP first, TPH then TPL. Only by this

order, the pre-charge circuit of ROM will work correctly. 5us waiting is necessary before LDV

instruction is executed since Data ROM is a low speed ROM. Users can not emulate accessing delay

with ICE. So 5us delay should be added by firmware.

2.

LCD driving circuit must be turned off before MCU goes into sleep mode.

3.

Please bond the TSTP_P, RSTP_N and PRTD[7:0] with test points on PCB, which can be soldered

and probed. Connect TSTP_P pin with zero ohm resistor to GND (or copper wire which can be cut

easily on PCB) for good ESD protection. So that IC testing can be done on PCB, if necessary, by

removing the 0-ohm resistor and driving TSTP_P pin to high.

4.

LV5 must small than 8.5 Volt. Otherwise IC may breakdown.

5.

Users must call the library “swap_page” in the file swappage.asm of AN029. The real IC register is

different from ICE4.x or ICE5.x. This subroutine make sure that users can run on both real IC and

ICE for page swapping. The program of swappage.asm as following:

.area

swapping_variable(data)

_mapreg1::

.ds

1 ;store page register(R1Bh)

_mapreg2::

.ds

1 ;store page register(R1Ch)

.area

swapping_page(code,pag0)

;======================================================

;swap page function

;======================================================

swap_page::

lda #10h

sta _mapreg1

lda #00h

; P1E_O[2] <--0

to enable Port R1Fh

sta r_iceco

; R_ICECO is write only

lda _mapreg2

sta r_iced

lda _mapreg2

anda #0fh

ora #20h

;Mapping _mapreg2 low nibble to Logical segment2

;

sta r1Ch

sta r_ps1

lda _mapreg2