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−180

−160

−140

−120

−100

−80

−60

−40

−20

0

0

1

2

3

4

5

6

7

8

G021

−180

−160

−140

−120

−100

−80

−60

−40

−20

0

0

1

2

3

4

5

6

7

8

G022

Jitter − ps

90

95

100

105

110

115

120

125

0

100

200

300

400

500

600

G020

PCM1609A

SLES145A – AUGUST 2005 – REVISED AUGUST 2006

THEORY OF OPERATION (continued)

QUANTIZATION NOISE SPECTRUM

QUANTIZATION NOISE SPECTRUM

vs

(64

× OVERSAMPLING)

(128

× OVERSAMPLING)

Figure 37. Quantization-Noise Spectrum

Figure 38 illustrates the simulated jitter sensitivity of the PCM1609A. To achieve best performance, the system

clock jitter should be less than 300 picoseconds. This is easily achieved using a quality clock generation IC, like

the PLL170x from Texas Instruments.

JITTER DEPENDENCE

(64

× OVERSAMPLING)

Figure 38. Jitter Sensitivity

36

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