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STW81101AT 데이터시트(PDF) 19 Page - STMicroelectronics |
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STW81101AT 데이터시트(HTML) 19 Page - STMicroelectronics |
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19 / 48 page ![]() STW81101 Circuit description 19/48 5.4 A and B counters The 5-bit A-counter and 12-bit B-counter, in conjunction with the selected dual modulus (16/17 or 19/20) prescaler, make it possible to generate output frequencies which are spaced only by the reference frequency divided by the reference division ratio. Thus, the division ratio and the VCO output frequency are given by these formulas: where: FVCO: output frequency of VCO P: modulus of dual modulus prescaler (16 or 19 selected through the digital interface) B: division ratio of the main counter A: division ratio of the swallow counter Fref: input reference frequency R: division ratio of reference counter N: division ratio of PLL For a correct working of the VCO divider, B must be strictly higher than A. A can take any value ranging from 0 to 31. The range of N can vary from 256 to 65551 (P=16) or from 361 to 77836 (P=19). Figure 16. VCO divider diagram NB P A + × = F VCO BP A ) F ref × + × ( R ------------------------------------------------ = PC00403 5-bit 12-bit To PFD modulus VCOBUF+ VCOBUF- Prescaler 16/17 or 19/20 B-counter A-counter |
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