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LF3321 데이터시트(PDF) 13 Page - LOGIC Devices Incorporated |
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LF3321 데이터시트(HTML) 13 Page - LOGIC Devices Incorporated |
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13 / 28 page ![]() DEVICES INCORPORATED LF3321 Horizontal Digital Image Filter Improved Performance LOGIC Devices Incorporated 13 Feb 5, 2003 LDS.3321-A Video Imaging Products Functional Description Figure 12. Config and Select Register Loading Sequence w/ PAUSE Implementation ADDR1 DATA1 ADDR2 CONFIGURATION REGISTER CLK W2 W1: Configuration Register loaded with new data on this rising clock edge. PAUSEA/PAUSEB DATA1 SELECT REGISTER W1 W2: Select Register loaded with new data on this rising clock edge. LDA/LDB CFA/CFB11-0 Figure 11. Coefficient Bank Loading Sequence with PAUSE Implementation ADDR1 COEF0 COEF1 COEFFICIENT SET 1 CLK LDA/LDB CFA/CFB11-0 W1 W1: Coefficient Set 1 written to coefficient banks during this clock cycle. PAUSEA/PAUSEB COEF7 Figure 13. Round Register Loading Sequence with PAUSE Implementation ADDR1 DATA1 ROUND REGISTER CLK W1 W1: Round Register loaded with new data on this rising clock edge. PAUSEA/PAUSEB DATA2 DATA3 DATA4 LDA/LDB CFA/CFB11-0 |
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