| 전자부품 데이터시트 검색엔진 |
|
PEX8612 데이터시트(PDF) 3 Page - PLX Technology |
|
|
|||||||||||||||||||||||||||||
PEX8612 데이터시트(HTML) 3 Page - PLX Technology |
|
3 / 4 page ![]() Preliminary - PLX Confidential x4 CPU CPU CPU CPU CPU CPU CPU CPU PEX 8612 PEX 8612 PEX 8612 PEX 8612 x4 Memory Memory Memory Memory x16 x16 x4 Chipset Chipset Chipset Chipset PCIe Gen1 or PCIe Gen2 slots Endpoint Endpoint Endpoint Endpoint Figure 3. Fan-in/out Usage Network Interface Cards The PEX 8612 can also be utilized in communications applications such as Network Interface Cards (NICs). NICs, like the one shown in Figure 4, can utilize the PEX 8612 for its fan-out capabilities. In the example below, the PEX 8612 is being used on a Dual-port 10- Gigabit Ethernet (GE) NIC card. The PEX 8612 utilizes a x4 link to connect to the host and two x4 downstream links to fan-out to the 10GE ports. The peer-to-peer communication feature of the PEX 8612 allows the endpoints to communicate with each other without any intervention or management by the host. 10 GE 10 GE MAC/PHY MAC/PHY MAC/PHY MAC/PHY MAC/PHY MAC/PHY MAC/PHY MAC/PHY x4 x4 x4 Dual-Port NIC Dual-Port NIC PEX 8612 PEX 8612 PEX 8612 PEX 8612 Figure 4. 10GE NIC Fan-Out Embedded Systems The PEX 8612 is well suited for embedded applications as well. Embedded applications, like the example shown in Figure 5, commonly use a number of independent modules for functions such as control plane processing, data acquisition, or image processing to name a few possibilities. Figure 5 represents an embedded system utilizing a PEX 8612 to fan-out to two ASICs/FPGAs. x4 CPU CPU CPU CPU CPU CPU CPU CPU Memory Memory Memory Memory PEX 8612 PEX 8612 PEX 8612 PEX 8612 ASIC/ FPGA ASIC/ FPGA ASIC/ FPGA ASIC/ FPGA ASIC/ FPGA ASIC/ FPGA ASIC/ FPGA ASIC/ FPGA x4 x4 Chipset Chipset Figure 5. Embedded Systems Failover Storage Systems The PEX 8612’s Dual Cast feature proves to be very useful in storage systems. In the example shown in Figure 6, the Dual Cast feature enables the PEX 8612 to copy data coming from the host to two downstream ports (see yellow traffic patterns) in one transaction as opposed to having to execute two separate transactions to send data to the backup chassis. By offloading the task of backing up data onto the secondary system, processor and system performance is enhanced. 8 Disk Chassis FC Control FC Control FC Control FC Control FC Control FC Control FC Control FC Control 8 Disk Chassis FC Control FC Control FC Control FC Control FC Control FC Control FC Control FC Control x4 x4 x4 x4 PEX 8612 PEX 8612 PEX 8612 PEX 8612 PEX 8612 PEX 8612 PEX 8612 PEX 8612 x4 CPU CPU CPU CPU CPU CPU CPU CPU Memory Memory Memory Memory Chipset Chipset Chipset Chipset PEX 8612 PEX 8612 PEX 8612 PEX 8612 x4 x4 Figure 6. Dual Cast in Storage Systems |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |