74ALVC574 datasheet(9/17 Pages) NXP

9 / 17 page

74ALVC574_2

Product data sheet

Rev. 02 — 8 November 2007

9 of 17

NXP Semiconductors

74ALVC574

Octal D-type ﬂip-ﬂop; positive edge-trigger; 3-state

11. Waveforms

Measurement points are given in Table 8.

VOL and VOH are the typical output voltage levels that occur with the output load.

Fig 7.

Clock (CP) to output (Qn) propagation delays, the clock pulse width, and the maximum frequency

mna894

CP input

Qn output

tPHL

tPLH

1/fmax

VOH

GND

VOL

Table 8.

Measurement points

Supply voltage

Input

Output

VCC

1.65 V to 1.95 V

0.5VCC

VOL + 0.15 V

VOH − 0.15 V

2.3 V to 2.7 V

0.5VCC

VOL + 0.15 V

VOH − 0.15 V

2.7 V

1.5 V

VOL + 0.3 V

VOH − 0.3 V

3.0 V to 3.6 V

1.5 V

VOL + 0.3 V

VOH − 0.3 V

Measurement points are given in Table 8.

VOL and VOH are the typical output voltage levels that occur with the output load.

Fig 8.

Enable and disable times

mna644

tPLZ

tPHZ

outputs

disabled

outputs

enabled

outputs

enabled

output

LOW-to-OFF

OFF-to-LOW

output

HIGH-to-OFF

OFF-to-HIGH

OE input

VOL

VOH

VCC

GND

tPZL

tPZH

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