74LVC1G10GM datasheet(6/14 Pages) NXP

6 / 14 page

74LVC1G10_1

Product data sheet

Rev. 01 — 2 October 2007

6 of 14

NXP Semiconductors

74LVC1G10

Single 3-input NAND gate

11. Dynamic characteristics

[1]

Typical values are measured at Tamb =25 °C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.

[2]

tpd is the same as tPLH and tPHL.

[3]

CPD is used to determine the dynamic power dissipation (PD in µW).

PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

Σ(C

L × VCC

× f

o) = sum of the outputs.

12. Waveforms

Table 8.

Dynamic characteristics

Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 8.

Symbol Parameter

Conditions

−40 °C to +85 °C

−40 °C to +125 °C Unit

Min

Typ[1]

Max

Min

Max

tpd

propagation delay

A, B and C to Y; see Figure 7

[2]

VCC = 1.65 V to 1.95 V

1.5

4.7

18.0

1.5

21.5

VCC = 2.3 V to 2.7 V

1.0

3.0

6.5

1.0

7.8

VCC = 2.7 V

1.0

3.0

6.0

1.0

7.5

VCC = 3.0 V to 3.6 V

1.0

2.6

5.0

1.0

6.2

VCC = 4.5 V to 5.5 V

1.0

1.9

3.6

1.0

4.4

CPD

power dissipation

capacitance

VI = GND to VCC; VCC = 3.3 V

[3]

-12-

Measurement points are given in Table 9.

VOL and VOH are typical output voltage levels that occur with the output load.

Fig 7.

The input (A, B, C) to output (Y) propagation delays

001aag692

tPLH

tPHL

A, B, C,

input

Y output

GND

VOH

VOL

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