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SM5837AF 데이터시트(PDF) 7 Page - Nippon Precision Circuits Inc |
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SM5837AF 데이터시트(HTML) 7 Page - Nippon Precision Circuits Inc |
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7 / 10 page ![]() SM5837AF SEIKO NPC CORPORATION —7 FUNCTIONAL DESCRIPTION The SM5837AF provides a built-in 1H delay for video signal processing. The delay can be set to a length of 31 to 2078 clock delay bits. The delay length (LH) can be set using 2 methods, selected by the state of PARA. When PARA is HIGH, the delay length is set by parallel input data on DL0 to DL10. When PARA is LOW, the delay length is set by serial input data using SDI, SICK and LEN. Accordingly, the function of DL0/SDI, DL1/SICK and DL2/LEN is determined by PARA. Parallel Input Set Method (PARA, DL0 to DL10) When PARA is HIGH, parallel input data is used to set the delay length. The delay length (LH) is determined by the input data on DL0 to DL10 as shown in equation 1 and table 1. Table 1. Delay bit length setting DL10 DL9 DL8 DL7 DL6 DL5 DL4 DL3 DL2 DL1 DL0 Delay length 00000000000 31 00000000001 32 00000000010 33 00000000011 34 00000000100 35 ↓↓↓↓↓↓↓↓↓↓↓ ↓ 00111100001 512 00111100010 513 ↓↓↓↓↓↓↓↓↓↓↓ ↓ 01111100001 1024 01111100010 1025 ↓↓↓↓↓↓↓↓↓↓↓ ↓ 11111100001 2048 11111100010 2049 ↓↓↓↓↓↓↓↓↓↓↓ ↓ 11111111110 2077 11111111111 2078 LH = 31 + (1) {DLk × 2 } Σ 10 k k = 0 |
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