L6731BTR datasheet(19/24 Pages) STMICROELECTRONICS

부품명	L6731BTR

상세설명	Adjustable step-down controller with synchronous rectification Dedicated to DDR Memory

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제조업체	STMICROELECTRONICS [STMicroelectronics]

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19 / 24 page

L6731B

Application details

19/24

6.3

Input capacitors

The input capacitors have to sustain the RMS current flowing through them, that is:

Where D is the duty cycle. The equation reaches its maximum value, IOUT /2 with D = 0.5. The

losses in worst case are:

6.4

Compensation network

The loop is based on a voltage mode control (Figure 18.). The output voltage is regulated to the

internal/external reference voltage and scaled by the external resistor divider. The error

amplifier output VCOMP is then compared with the oscillator triangular wave to provide a pulse-

width modulated (PWM) with an amplitude of VIN at the PHASE node. This waveform is filtered

by the output filter. The modulator transfer function is the small signal transfer function of VOUT/

VCOMP. This function has a double pole at frequency FLC depending on the L-COUT resonance

and a zero at FESR depending on the output capacitor's ESR. The DC Gain of the modulator is

simply the input voltage VIN divided by the peak-to-peak oscillator voltage: VOSC.

Figure 11. Compensation Network

)

(

Iout

Irms

−

⋅

)

(

Iout

ESR

⋅

L6731BTR 데이터시트(PDF) 19 Page - STMicroelectronics