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TMPR4937 데이터시트(PDF) 146 Page - Toshiba Semiconductor

부품명 TMPR4937
상세설명  64-Bit TX System RISC TX49 Family
PDF  552 Pages
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제조업체  TOSHIBA [Toshiba Semiconductor]
홈페이지  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR4937 데이터시트(HTML) 146 Page - Toshiba Semiconductor

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Chapter 7 External Bus Controller
7-46
7.5.9
External ACK Mode Access (32-bit Bus)
Note 1: The TX4937 sets the ACK* signal to High Impedance in the S1 State.
Note 2: External devices drive the ACK* signal to Low (assert the signal) by the ES1 State.
Note 3: External devices drive the ACK* signal to High (deassert the signal) in the ES2
State. If an external device is late in asserting ACK*, then the Wait State is inserted
for the amount of time the external device is late. If a certain condition is met, it is
okay for the ACK* signal to be driven to Low for 1 clock cycle or more. See 7.3.7.4
ACK* Input Timing (External ACK Mode) for more information.
Figure 7.5.23 1-word Single Write (0 Wait, SHWT=0, External ACK*, 32-bit Bus)
Figure 7.5.24 1-word Single Read (0 Wait, SHWT=0, External ACK*, 32-bit Bus)
SYSCLK
CE*
ADDR[19:0]
ACE*
OE*/BUSSPRT*
SWE*
BWE*
BE*
DATA[31:0]
S1
ES2
ES1
S2
S3
ACK*
f
0
f
f
SYSCLK
CE*
ADDR[19:0]
ACE*
OE*/BUSSPRT*
SWE*
BWE*
BE*
DATA[31:0]
S1
ES2
ES1
ES3
S3
S2
ACK*
0
f
f
f0
f



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