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TMPR4937 데이터시트(PDF) 198 Page - Toshiba Semiconductor |
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TMPR4937 데이터시트(HTML) 198 Page - Toshiba Semiconductor |
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198 / 552 page ![]() Chapter 8 DMA Controller 8-42 8.5.3 Single Address Single Transfer from I/O to Memory (32-bit SRAM) Figure 8.5.3 Single Address Single Transfer from I/O to Memory (Single Write of 32-bit Data to 32-bit SRAM) SYSCLK ADDR [19:0] OE*/BUSSPRT* DATA [31:0] DMADONE* 1c040 CE* ACE* SWE* BWE* ACK* DMAREQ[n] DMAACK [n] 00140 f 00000100 0 f |
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