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TMPR4937 데이터시트(PDF) 211 Page - Toshiba Semiconductor |
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TMPR4937 데이터시트(HTML) 211 Page - Toshiba Semiconductor |
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211 / 552 page ![]() Chapter 8 DMA Controller 8-55 8.5.15 External I/O Device – SRAM Dual Address Transfer Figure 8.5.16 Dual Address Transfer from External I/O Device to SRAM (8-word Burst Transfer to 32-bit Bus SRAM) SYSCLK CE* (SRAM) CE* (I/O device) ADDR [19:0] ACE* DATA [31 : 0] SWE* ACK* DMAREQ[n] DMAACK[n] DMADONE* OE*/BUSSPRT* BWE* X X X X X X X f Valid Valid Valid Valid Valid Valid Valid Valid fffff f f f V V V V V V V V |
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