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Axelite Confidential Materials, do not copy or distribute without written consent.

Rev1.3 Oct.08 2019

AX3077



BLOCK DIAGRAM

+

-

0.4V

-

+

VREF

EA

FB

COMP

ramp

VIN

5V

BS

5V

Fault

Logics

UG

LX

+

-

SEN1

0.1V

Cable

compensation

GND

LG

UV

Over Temperature

Protection

UVLO

Internal

Regulator

+

-

0.4V

Current

Sensor1

Current

Sensor2

SEN2

0.1V

Oscillator

120KHz

Gate

Control

Zero

Current

Detection

OCSET

+

-

OV

1.08V

Discharge

10V



PIN ASSIGNMENT

The package of AX3077 are MSOP-10L-EP and TDFN-10L(3*3) the pin assignment is given

by:

(Top View)

1

2

3

4

8

7

6

5

MSOP-10L-EP

VIN

FB

SEN2

COMP

LX

BS

OCSET

UG

9

10

SEN1

LG

AX3077

(GND)

TDFN-10L(3*3)

LG

1

SEN1

10

2

3

4

5

6

7

8

9

VIN

COMP

SEN2

UG

LX

BS

(GND)

FB

OCSET