TMP86CS64AFG datasheet(75/202 Pages) TOSHIBA

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Page 65

TMP86CS64AFG

5.8 Port P7 (P77 to P70)

Port P7 is an 8-bit input/output port, which can be configured individually as an input or an output under software

control. Port P7 is also used as an analog input and Key on Wake up input. Input/output mode is specified by the cor-

responding bit in the port P7 input/output control register (P7CR), P7 output latch (P7DR) and ADCCR1<AINDS>.

During reset, P7CR and P7DR are initialized to “0” and ADCCR1<AINDS> is set to “1”. At the same time, the input

data of P77 to P70 are fixed to “0” level. When port P7 is used as input port, the corresponding bit in P7CR and

P7DR should be set to input mode (P7CR = “0”, P7DR = “1”). When used as output port, the corresponding bit in

P7CR should be set to “1”. When used as analog input port, the corresponding bit in P7CR and P7DR should be set

to analog input mode (P7CR = “0”, P7DR = “0”) and ADCCR1<AINDS> is set to “0”, then the AD conversion is

started. Setting P7DR to “0” is necessary to prevent generating the penetration electric current. So the output latch of

the port used as analog input should be set to “0” beforehand. Actually selection of the conversion input channels is

specified by ADCCR1<SAIN>.

Pins used for analog input can be used as I/O port. During AD conversion, output instructions should not be exe-

cuted to keep a precision. In addition, a variable signal should not be input to a port adjacent to the analog input dur-

ing AD conversion.

When the AD converter is in use (P7DR = “0”), bits mentioned above are read as “0” by executing input instruc-

tions.

Note 1: i = 7 to 0, j = 5 to 2

Note 2: STOP: bit 7 in SYSCR1, OUTEN: bit 4 in SYSCR1

Note 3: SAIN: bit 0 to 3 in ADCCRA

Note 4: SOTPjEN: bit 4 to 7 in STOPCR

Figure 5-9 Port P7

Analog input

AINDS

SAIN

STOP

OUTEN

Data input

Data output

P7CRi

STOPjEN

P7i

Key on Wake up

Pull-up resistor

(Typ. 80 k

Ω)

P7PUi

VDD

Output latch

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