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TMP86FS49AIUG 데이터시트(PDF) 172 Page - Toshiba Semiconductor

부품명 TMP86FS49AIUG
상세설명  8 Bit Microcontroller
PDF  296 Pages
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제조업체  TOSHIBA [Toshiba Semiconductor]
홈페이지  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP86FS49AIUG 데이터시트(HTML) 172 Page - Toshiba Semiconductor

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13. Asynchronous Serial interface (UART2 )
13.9 Status Flag
TMP86FS49AIUG
Figure 13-7 Generation of Overrun Error
Note:Receive operations are disabled until the overrun error flag UART2SR<OERR> is cleared.
13.9.4 Receive Data Buffer Full
Loading the received data in RD2BUF sets receive data buffer full flag UART2SR<RBFL> to "1". The
UART2SR<RBFL> is cleared to “0” when the RD2BUF is read after reading the UART2SR.
Figure 13-8 Generation of Receive Data Buffer Full
Note:If the overrun error flag UART2SR<OERR> is set during the period between reading the UART2SR and read-
ing the RD2BUF, it cannot be cleared by only reading the RD2BUF. Therefore, after reading the RD2BUF,
read the UART2SR again to check whether or not the overrun error flag which should have been cleared still
remains set.
13.9.5 Transmit Data Buffer Empty
When no data is in the transmit buffer TD2BUF, UART2SR<TBEP> is set to “1”, that is, when data in
TD2BUF are transferred to the transmit shift register and data transmit starts, transmit data buffer empty flag
UART2SR<TBEP> is set to “1”. The UART2SR<TBEP> is cleared to “0” when the TD2BUF is written after
reading the UART2SR.
Final bit
Stop
Shift register
xxxx0*
1xxxx0
yyyy
xxx0**
RXD2 pin
UART2SR<OERR>
INTRXD2 interrupt
After reading UART2SR then
RD2BUF clears OERR.
RD2BUF
UART2SR<RBFL>
Final bit
Stop
Shift register
xxxx0*
1xxxx0
xxxx
yyyy
xxx0**
RXD2 pin
UART2SR<RBFL>
INTRXD2 interrupt
RD2BUF
After reading UART2SR then
RD2BUF clears RBFL.



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