KSZ9567R_V01 datasheet(185/233 Pages) MICROCHIP

185 / 233 page

 2022 Microchip Technology Inc. and its subsidiaries

DS00002329E-page 185

KSZ9567R

5.2.11.8

Port PTP Egress Timestamp for PDelay_Resp High Word Register

5.2.11.9

Port PTP Egress Timestamp for PDelay_Resp Low Word Register

5.2.11.10

Port PTP Timestamp Interrupt Status Register

Address:

0xNC10 - 0xNC11

Port N: 1-7

Size:

16 bits

Bits

Description

Type

Default

15:0

PTP Port N Egress Timestamp for Pdelay_Resp in Nanoseconds

(PDLY_TS[31:16])

This field contains the Port N egress timestamp high-word value for the Pde-

lay_Resp frame in nanoseconds.

0x0000

Address:

0xNC12 - 0xNC13

Port N: 1-7

Size:

16 bits

Bits

Description

Type

Default

15:0

PTP Port N Egress Timestamp for Pdelay_Resp in Nanoseconds

(PDLY_TS[15:0])

This field contains the Port N egress timestamp low-word value for the Pde-

lay_Resp frame in nanoseconds.

0x0000

Address:

0xNC14 - 0xNC15

Port N: 1-7

Size:

16 bits

Bits

Description

Type

Default

Port N Egress Timestamp for Sync Frame Interrupt Status

(TS_SYNC_INT_STATUS)

When this bit is set to 1, it indicates that the egress timestamp is available

from Port N for the Sync frame.

This bit is logical OR’ed together with the rest of the bits in this register and

the output is shown as the PTP Interrupt Status bit in the Port Interrupt Status

R/W1C

Port N Egress Timestamp for Pdelay_Req and Delay_Req Frames

Interrupt Status (TS_PDLY_REQ_INT_STATUS)

When this bit is set to 1, it indicates that the egress timestamp is available

from Port N for the Pdelay_Req and Delay_Req frames.

This bit is logical OR’ed together with the rest of the bits in this register and

the output is shown as the PTP Interrupt Status bit in the Port Interrupt Status

R/W1C

Port N Egress Timestamp for Pdelay_Resp Frame Interrupt Status

(TS_PDLY_RESP_INT_STATUS)

When this bit is set to 1, it indicates that the egress timestamp is available

from Port N for the Pdelay_Resp frame.

This bit is logical OR’ed together with the rest of the bits in this register and

the output is shown as the PTP Interrupt Status bit in the Port Interrupt Status

R/W1C

12:0

RESERVED

0x000

KSZ9567R 데이터시트(PDF) 185 Page - Microchip Technology

KSZ9567R 데이터시트(HTML) 185 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL