MCP3460RT-ESLASH2LX datasheet(2/103 Pages) MICROCHIP

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MCP3460R

DS20006975A-page 2

 2025 Microchip Technology Inc. and its subsidiaries

General Description

The MCP3460R is a precision 16-bit single differential-

channel (two single-ended)

 ADC device, with

programmable data rates up to 153.6 kSPS.

The MCP3460R device uses a second-order delta-

sigma multi-bit modulator with Oversampling Ratio

(OSR) from 32 to 98304 and gain settings ranging

from 1/3x to 64x. The dual SINC filter implementation

can achieve a SINAD of 97.2 dB or up to 153.6 kSPS

ADC conversion rate.

MCP3460R offers two selectable conversion modes:

Continuous

Conversion

mode

and

One-Shot

Conversion mode. In One-Shot Conversion mode, the

device enters a low-power mode automatically after

each conversion is completed, while Continuous

Conversion mode offers the capability of non-stop

conversions of an individual channel until the ADC is

instructed to stop.

The MCP3460R includes an internal input-channel

scan-sequencer (Scan mode) which offers automatic

scanning of selected input channels and internal

system resources such as Temperature, Supply

Voltage, Offset Error and Gain Error. A 24-bit Timer

can be used to create automatic conversion-loop

sequences without the need for MCU communication.

To reduce system component count and total solution

cost, the MCP3460R device offers integrated features

such as an Internal Voltage Reference, Internal Clock

Oscillator,

Internal

Temperature

Sensor

and

Programmable Gain, which are configurable using the

bit settings of the internal configuration registers.

The internal configuration registers are easily

accessible via a 20 MHz SPI-compatible serial

interface using simple 8-bit SPI Commands and

communication protocols for various Continuous

Read/Write Modes.

The various data-format options offer flexible user-

friendly connectivity with various 8-bit, 16-bit and 32-

bit host MCUs.

internal

16-bit

Cyclic-Redundancy-Checksum

engine (CRC-16) protects the data integrity of the

internal register settings (Register-Map Lock) and SPI

communications.

The device operates from an analog/digital supply of

2.7V to 3.6V and is available in a 3 mm x 3 mm x 1 mm,

20-Lead VQFN (2LX Package Code) which is specified

over an Extended Temperature Range of -40°C to

+125°C.

Package Type

Functional Block Diagram

6 78 9 10

20 19 18

CH0

CH1

SCK

SDO

REFIN-

REFIN+/OUT

SDI

IRQ/MDAT

*Includes Exposed Thermal Pad (EP); see Table 3-1.

MCP3460R

20-Lead, VQFN* (3 x 3 x 1 mm)

AMCLK

DMCLK/DRCLK

POR

AVDD

Monitoring

VREF+

MCLK

IRQ/MDAT

Digital SPI

Interface

and Control

Clock

Generation

(RC Oscillator)

DMCLK

OSR[3:0]

PRE[1:0]

ANALOG

DIGITAL

SDO

SDI

SCK

AGND

DGND

AVDD

DVDD

VIN+

VIN-

2nd Order

Modulator

with Analog

Gain

Offset/Gain

Calibration

POR

DVDD

Monitoring

REFIN+/OUT

REFIN-

VREF-

SINC3 Filter

with Digital

Gain

SINC1

Filter

A/D Converter

Analog

Differential

Multiplexer

CH0

TEMP

Diodes

AGND AVDD

VREF_SEL

Voltage

Reference

‐

2.4V

CH1

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