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TB62801F 데이터시트(PDF) 2 Page - Toshiba Semiconductor |
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TB62801F 데이터시트(HTML) 2 Page - Toshiba Semiconductor |
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2 / 20 page ![]() TB62801F 2006-06-13 2 Logic Diagram Pin Description Pin No. Pin Name Functions Remarks 1 2B_ out Light-load drive output (inverted) Driver output for CCD last-stage clock 2 2B_in Light-load drive input Driver input for CCD last-stage clock 3 CP_in Light-load drive input CCD clamp gate driver input 4 VCC Power supply ― GND Ground ― 5 VCC Power supply ― 6 CK_in Heavy-load drive input Driver input for CCD transfer clock 7 SH_in Light-load drive input CCD shift gate driver input 8 RS_in Light-load drive input CCD reset gate driver input 9 RS_out Light-load drive output (not inverted) CCD reset gate driver output 10 SH_out Light-load drive output (not inverted) CCD shift gate driver output 11 φ Heavy-load drive output (not inverted) Driver output for CCD transfer clock 12 φ Heavy-load drive output (inverted) Driver output for CCD transfer clock GND Ground ― 13 φ Heavy-load drive output (inverted) Driver output for CCD transfer clock 14 φ Heavy-load drive output (not inverted) Driver output for CCD transfer clock 15 CP_out Light-load drive output (not inverted) CCD clamp gate driver output 16 2B_out Light-load drive output (not inverted) Driver output for CCD last-stage clock φ φ φ φ CK_in CP_out CP_in SH_out SH_in RS_out RS_in 2B_in 2B_ out 2B_out |
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