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ACT8865 데이터시트(PDF) 13 Page - Qorvo, Inc |
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ACT8865 데이터시트(HTML) 13 Page - Qorvo, Inc |
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13 / 32 page ![]() ACT8865 Advanced PMU for Atmel SAMA5Dx Series & SAM9 Series Processors Data Sheet Rev. H, September 2019 | Subject to change without notice 13 of 32 www.qorvo.com © 2020 Qorvo US, Inc. All rights reserved. REGISTER AND BIT DESCRIPTIONS CONT’D OUTPUT ADDRESS BIT NAME ACCESS DESCRIPTION REG7 0x65 [6] DIS R/W Output Discharge Control. When activated, discharges LDO output to GA through 1.5kΩ when in shutdown. Set bit to 1 to enable output voltage discharge in shutdown, clear bit to 0 to disable this function. REG7 0x65 [5] LOWIQ R/W LDO Low-IQ Mode Control. Set bit to 1 for low-power operating mode, clear bit to 0 for normal mode. REG7 0x65 [4:2] DELAY R/W Regulator Turn-On Delay Control. See the REG4, REG5, REG6, REG7 Turn-on Delay section for more information. REG7 0x65 [1] nFLTMSK R/W Regulator Fault Mask Control. Set bit to 1 enable to fault- interrupts, clear bit to 0 to disable fault-interrupts. REG7 0x65 [0] OK R/W Regulator Power-OK Status. Value is 1 when output voltage exceeds the power-OK threshold, value is 0 otherwise. |
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