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Additional Technical documents

1. Cortex-M33 Technical Reference Manual - TRM

2. Cortex-M33 Integration and Implementation Manual – available as part of the Bill of Materials

3. Armv8-M Architecture Reference Manual - Arm

4. CoreSight ETM-M33 Technical Reference Manual - ETM

5. CoreSight MTB-M33 Technical Reference Manual - MTB

Glossary of Terms

ACI

Arm Custom Instructions

AHB

Advanced High-performance Bus

APB

Advanced Peripheral Bus

ATB

Advanced Trace Bus

BPU

Breakpoint Unit

C-AHB

Code AHB

CDE

Custom Datapath Extension

CTI

Cross Trigger Interface

CTM

Cross Trigger Matrix

D-AHB

Debug AHB

DSP

Digital Signal Processing

DWT

Data Watchpoint and Trace

EPPB

External Private Peripheral Bus

ETM

Instruction TraceEmbedded Trace Macrocell

FPU

Floating-point Unit

IDAU

Implementation Defined Attribution Unit

IEEE

Institute of Electrical and Electronics Engineers

ISR

Interrupt Service Routine

ITM

Instrumentation Trace Macrocell

JTAG

Joint Test Action Group

MAC

Multiply and Accumulate

MPU

Memory Protection Unit

MTB

Micro Trace Buffer

NMI

Non-maskable Interrupt

NVIC

Nested Vectored Interrupt Controller

PMSA

Protected Memory System Architecture

PMU

Power Management Unit

PPB

Private Peripheral Bus

PSA

Platform Security Architecture

RAM

Rand Access Memory

ROM

Read Only Memory

S-AHB

System AHB