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ADPL42002ACPZN2.5-R7 데이터시트(PDF) 16 Page - Analog Devices

부품명 ADPL42002ACPZN2.5-R7
상세설명  20V, 200mA, Low Noise, CMOS LDO Linear Regulator
PDF  22 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

ADPL42002ACPZN2.5-R7 데이터시트(HTML) 16 Page - Analog Devices

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Data Sheet
ADPL42002
analog.com
Rev. 1
16 of 22
Soft Start
The ADPL42002 uses an internal soft start (when the SS pin is left open) to limit the inrush current when the output
is enabled. The start-up time for the 3.3V option is approximately 400µs from the time the EN active threshold is
crossed to when the output reaches 90% of the final value. As shown in Figure 30, the start-up time is indepezndent
of the output voltage setting.
Figure 30. Typical Start-Up Behavior
An external capacitor connected to the SS pin determines the soft-start time. This SS pin can be left open for a typical
400µs start-up time. Do not ground this pin. When an external soft-start capacitor (CSS) is used, the soft-start time is
determined by the following equation:
SSTIME (sec) = tSTART-UPat0pF + (0.6 × CSS)/ISS
(7)
Where:
tSTART-UP at 0 pF is the start-up time at CSS = 0pF (typically 400µs).
CSS is the soft-start capacitor (F).
ISS is the soft-start current (typically 1.15µA).
Figure 31. Typical Soft Start Behavior, Different CSS
TIME (ms)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
1
2
3
4
6
5
VEN
VOUT = 1.8V
VOUT = 3.3V
VOUT = 5.0V
TIME (ms)
10
9
8
7
6
5
4
3
2
1
0
0
0.5
1.0
2.0
3.0
3.5
1.5
2.5
VEN
NO SS CAP
1nF
2nF
4.7nF
6.8nF
10nF



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