| 전자부품 데이터시트 검색엔진 |
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L6924D 데이터시트(PDF) 16 Page - STMicroelectronics |
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L6924D 데이터시트(HTML) 16 Page - STMicroelectronics |
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16 / 38 page ![]() Operation description L6924D 16/38 Neglecting the voltage drop across the charger ( ∆V MOS) when the device operates in this condition, its input voltage is equal to the battery one, and so a very low operating input voltage (down to 2.5V) is required. The power dissipated by the device during this phase is: When the battery voltage approaches the final value, the charger gets back the control of the current, reducing it. Due to this, the upstream adapter exits the current limit condition and its output goes up to the regulated voltage VADP. This is the worst case in power dissipation: In conclusion, the advantage of the linear charging approach is that the designer has the direct control of the charge current, and consequently the application can be very simple. The drawback is the high power dissipation. The advantage of the Quasi-Pulse charging method is that the power dissipated is dramatically reduced. The drawback is that a dedicated upstream adapter is required. 2 ) ( LIM on DS CH I R P × = Eq: 7-4 LIM BAT ADP DIS I V V P × − = ) ( Eq: 7-5 |
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