RFSA4013

Temperature Compensating Attenuator

Datasheet Rev F, January 25, 2024 | Subject to change without notice

13 of 17

www.qorvo.com

®

Pin Configuration and Description

Top View

Pin No.

Label

Description

1, 5, 8, 12, 13, 14, 16

GND

RF/DC ground connection

2, 4, 9, 11

NC

No Connection internally, NC on evaluation PCB, can be connected to GND externally

3

RFIN

RF Input, External DC blocking require

6

MODE1

Logic control Input 1, Attenuation temperature coefficient slope selection

7

MODE2

Logic control Input 2, Attenuation temperature coefficient slope selection

10

RFOUT

RF Output, External DC blocking require

15

VDD

DC supply voltage input

Backside Paddle

GND

RF & DC Ground. Use recommended via hole pattern to minimize inductance and thermal

resistance. See PCB Mounting Pattern for suggested footprint.